6 - bit flash ADC - undergrad

zero phase shift, 35 dB SNR/5.5 ENOB 1 GHz flash adc designed on the TSMC 200 nm process. includes custom designed high-speed comparators, sample and hold circuitry, and rom decoders with bubble error detection/correction

various asic implementations - professional

implemented several (first time success) digital designs in silicon based on customer needs. designed the innovus place and route flow from the ground up including standard gate design and LEF file generation. achieved timing closure on 100 MHz+ designs with several thousand gates.

107dB SNR desktop audio DAC - undergrad

designed a high-performance DAC featuring the TI PCM1792A and the XMOS XU316 embedded microprocessor. everything from the pcb to the firmware was custom designed and implemented by me. the DAC supports up to 192kHz/24bit audio over USB, and features a carefully designed analog output stage with ultra low noise LT1028 opamps ensuring perfect audio.